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RM1221A

    High speed 1T enhanced MTP SOC ROM/ROM space based on 8051 instruction: 16K* 8-bit MTP, can be written 10K times, 10 years storage life at 105℃ / EEPROM space: 512 BYTE, can be repeatedly written 20K times, 10 years storage life at 105℃ : Support 1K BYTE LDROM, Code Option to boot from APROM or LDROM, support two-line emulation, IAP and ICP operation, flexible code protection mode RAM / 256 BYTE IRAM / 7

RM1221A Product Description:
Functional characteristics
High speed 1T enhanced MTP SOC based on instruction 8051
ROM
  ┄ ROM space: 16K* 8-bit MTP, can be repeatedly written 10K times, 10 years storage life at 105℃
  ┄ EEPROM space: 512 BYTE, can be written 20K times, 10 years storage life at 105℃
  ┄ BootLoader: Support 1K BYTE LDROM, Code Option to boot from APROM or LDROM
  ┄ Support dual simulation, IAP and ICP operation
  ┄ Flexible code protection mode
RAM
┄ 256 BYTE IRAM
┄ 768 BYTE XRAM
Working condition
-- Application environment: 1.8~5.5V@-40~85℃
-- Working voltage range of the system clock (fsys)
-- > 16MHz@2.9~5.5V
-- ≤8MHz@2.4~5.5V
Clock system
- Built-in High frequency 32MHz Oscillator (fHRC)
---- As the system clock source, fsys can be set to 16M/ 8M/ 4MHz/ 2M with a programmer option
-- Frequency error: across (2.5V~5.5V) and (-20~85℃) application environment, not more than ±1%
-- The built-in high frequency crystal oscillator circuit and low frequency 32.768KHz crystal oscillator circuit
-- 2~16MHz crystal oscillator or 32.768KHz crystal oscillator can be connected externally
---- as the system clock source, fsys can choose to use one of the four types of external crystal 1/2/4/16
-- Internal high speed clock 32M can be corrected by external 32.768K
-- Built in low frequency 128KHZ LRC oscillator
- Can be used as a clock source for watchdog timers (WDT) and self-wake timers (WKT)
- 128K clock can be corrected with internal high speed clock 32M
-- Frequency error: across (4.0V~5.5V) and (-20~85℃) application environment, frequency error does not exceed ±4%
Low voltage reset (LVR)
Reset voltage (1.9~4.3V), a total of 8 optional
The default value is the value chosen by the user to burn Code Option
16 level optional Low Voltage Detection Module (LVD)
Interrupt source (INT)
There are 27 interrupt sources Pustimer0/1/2/3/4, WKT, ADC, PWM, UART, SPI, IIC, TK, LVD
External interrupt, all IO ports can be used as external interrupt a total of 26 interrupts, can be set drop edge, low level interrupt, all PA, PB, PC and PD share a total of 4 entry addresses
A four-level interrupt priority can be set
GPIO
Up to 26 bidirectional independently controlled I/O ports, can be independently set pull-up resistance, can be set to open leakage output
The drive capability of IO port source is divided into four stages
Full IO with large filling current drive capability (80mA)
All IO can be used as 1/2 BIAS, 1/3BIAS software LCD driver
Digital Peripheral Function Pin Full Mapping Module (PTM)
Digital peripheral
8-bit WDT and WKT
Two compatible 80C51 timers Timer0, Timer1 (Standard 51)
16bit Timer2 with 3-way input capture function, input pin can be arbitrarily configured
16bit Timer3 can operate in normal mode and power down mode
16 bit Timer4/PWM
┄ PWM
- 1 set of 16-bit 3-on-6 channels with PWM for different operating modes and brake failure functions, clock up to 32MHz
-- 1 set of 16-bit 1 to 2-channel 16-bit, multiplexing PWM of TIMER4 time base
Two independent UART communication interfaces
One IIC
1 channel SPI
Integrated 16 X 16 bit hardware multiplier and divider
26 channels high sensitivity high reliability touch circuit
High sensitivity can be adapted to space key touch, proximity sensing and other touch applications with high sensitivity requirements
High reliability with strong anti-interference, can pass 10V dynamic CS test
Can realize 26 touch keys and derivative functions such as roller, slider and other applications
High flexibility development software library support, low development difficulty
Automated debugging software support, intelligent development
Low power touch mode, single touch key wake-up chip overall power consumption can be as low as 5uA
12-bit SAR ADC
Support up to 26+6 channels AD input, including VDD/4 voltage, IO/4, etc
The reference voltage source of the ADC can be VDD, internal reference (1V, 2V, 3V, 4V), external reference
Support for hardware boot and conversion result comparison
ADC conversion complete interrupt can be set
Operational amplifier 0
Full pin external support, manual calibration,
Support internal 16x, 64x magnification, the output can be selected after internal filtering to ADC
Power saving mode
IDLE mode: Wake up from any interruption
Power down (PD) mode: External interrupt, WDT, WKT, TIMER3 and TK wakeable
High reliability
ESD is better than ±8KV, EFT is better than ±4.5KV
Development tool
KEIL or RM based Integrated Development Environment (IDE), on-chip Debugging (OCD)
encapsulation
  ┄ SOP28/TSSOP28、SOP20/TSSOP20、SOP16

RM1221A system diagram:

RM1221A Pin Configuration:






RM1221A Clock System:
RM1221A reset circuit diagram:
RM1221A GPIO:
RM1221A Timer 2 block diagram:

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